From jira at ovirt-jira.atlassian.net Mon Feb 12 15:08:51 2018 Content-Type: multipart/mixed; boundary="===============4952029050087627617==" MIME-Version: 1.0 From: Daniel Belenky (oVirt JIRA) To: infra at ovirt.org Subject: [JIRA] (OVIRT-1894) Add conditional execution parameter (run_if) to DSL options Date: Mon, 12 Feb 2018 15:08:49 +0000 Message-ID: In-Reply-To: JIRA.33586.1518448115000@Atlassian.JIRA --===============4952029050087627617== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable This is a multi-part message in MIME format... ------------=3D_1518448129-17839-165 Content-Type: text/plain; charset=3DUTF-8 Content-Transfer-Encoding: 7bit [ https://ovirt-jira.atlassian.net/browse/OVIRT-1894?page=3Dcom.atlass= ian.jira.plugin.system.issuetabpanels:all-tabpanel ] Daniel Belenky reassigned OVIRT-1894: ------------------------------------- Assignee: Daniel Belenky (was: infra) > Add conditional execution parameter (run_if) to DSL options > ----------------------------------------------------------- > > Key: OVIRT-1894 > URL: https://ovirt-jira.atlassian.net/browse/OVIRT-1894 > Project: oVirt - virtualization made easy > Issue Type: Improvement > Components: STDCI DSL > Reporter: Daniel Belenky > Assignee: Daniel Belenky > > We want to have the ability to specify conditional execution of threads (= stage, substage, ... ) with different conditions. > The first condition to implement (and probably the most straightforward o= ne) is to execute a thread in certain files were changed. > Example schema for the syntax: > {code:yaml} > --- > stage: check-patch > substage: > - change1: > run-if: > - file-changed: > - change2: > run-if: > - file-changed: > - > - > {code} -- This message was sent by Atlassian Jira (v1001.0.0-SNAPSHOT#100079) ------------=3D_1518448129-17839-165 Content-Type: text/html; charset=3D"UTF-8" Content-Disposition: inline Content-Transfer-Encoding: 7bit 
[ https://ovirt-jira.atlassian.net/browse/OVIRT-1894?page=3Dcom.atlass=
ian.jira.plugin.system.issuetabpanels:all-tabpanel ]

Daniel Belenky reassigned OVIRT-1894:

Assignee: Daniel Belenky  (was: infra)

Add conditional execution parameter (run_if) to DSL options= 

     Key: OVIRT-1894
     URL: https://ovirt-jira.atlassian.net/browse/OVIRT-1894
 Project: oVirt - virtualization made easy
         Issue Type: Improvement
         Components: STDCI DSL
Reporter: Daniel Belenky
Assignee: Daniel Belenky

We want to have the ability to specify conditional execution of threads = (stage, substage, … ) with different conditions. The first condition= to implement (and probably the most straightforward one) is to execute a t= hread in certain files were changed. Example schema for the syntax: {code:y= aml} --- stage: check-patch substage:

  - change1:
      run-if:
        - file-changed: <filename>
  - change2:
      run-if:
        - file-changed:
- <file1>
- <file2>

{code}

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3D"" ------------=3D_1518448129-17839-165-- --===============4952029050087627617== Content-Type: multipart/alternative MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="attachment.bin" VGhpcyBpcyBhIG11bHRpLXBhcnQgbWVzc2FnZSBpbiBNSU1FIGZvcm1hdC4uLgoKLS0tLS0tLS0t LS0tPV8xNTE4NDQ4MTI5LTE3ODM5LTE2NQpDb250ZW50LVR5cGU6IHRleHQvcGxhaW47IGNoYXJz ZXQ9VVRGLTgKQ29udGVudC1UcmFuc2Zlci1FbmNvZGluZzogN2JpdAoKCiAgICAgWyBodHRwczov L292aXJ0LWppcmEuYXRsYXNzaWFuLm5ldC9icm93c2UvT1ZJUlQtMTg5ND9wYWdlPWNvbS5hdGxh c3NpYW4uamlyYS5wbHVnaW4uc3lzdGVtLmlzc3VldGFicGFuZWxzOmFsbC10YWJwYW5lbCBdCgpE YW5pZWwgQmVsZW5reSByZWFzc2lnbmVkIE9WSVJULTE4OTQ6Ci0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tLS0KCiAgICBBc3NpZ25lZTogRGFuaWVsIEJlbGVua3kgICh3YXM6IGlu ZnJhKQoKPiBBZGQgY29uZGl0aW9uYWwgZXhlY3V0aW9uIHBhcmFtZXRlciAocnVuX2lmKSB0byBE U0wgb3B0aW9ucwo+IC0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t LS0tLS0tLS0tLS0tLS0tCj4KPiAgICAgICAgICAgICAgICAgS2V5OiBPVklSVC0xODk0Cj4gICAg ICAgICAgICAgICAgIFVSTDogaHR0cHM6Ly9vdmlydC1qaXJhLmF0bGFzc2lhbi5uZXQvYnJvd3Nl L09WSVJULTE4OTQKPiAgICAgICAgICAgICBQcm9qZWN0OiBvVmlydCAtIHZpcnR1YWxpemF0aW9u IG1hZGUgZWFzeQo+ICAgICAgICAgIElzc3VlIFR5cGU6IEltcHJvdmVtZW50Cj4gICAgICAgICAg Q29tcG9uZW50czogU1REQ0kgRFNMCj4gICAgICAgICAgICBSZXBvcnRlcjogRGFuaWVsIEJlbGVu a3kKPiAgICAgICAgICAgIEFzc2lnbmVlOiBEYW5pZWwgQmVsZW5reQo+Cj4gV2Ugd2FudCB0byBo YXZlIHRoZSBhYmlsaXR5IHRvIHNwZWNpZnkgY29uZGl0aW9uYWwgZXhlY3V0aW9uIG9mIHRocmVh ZHMgKHN0YWdlLCBzdWJzdGFnZSwgLi4uICkgd2l0aCBkaWZmZXJlbnQgY29uZGl0aW9ucy4KPiBU aGUgZmlyc3QgY29uZGl0aW9uIHRvIGltcGxlbWVudCAoYW5kIHByb2JhYmx5IHRoZSBtb3N0IHN0 cmFpZ2h0Zm9yd2FyZCBvbmUpIGlzIHRvIGV4ZWN1dGUgYSB0aHJlYWQgaW4gY2VydGFpbiBmaWxl cyB3ZXJlIGNoYW5nZWQuCj4gRXhhbXBsZSBzY2hlbWEgZm9yIHRoZSBzeW50YXg6Cj4ge2NvZGU6 eWFtbH0KPiAtLS0KPiBzdGFnZTogY2hlY2stcGF0Y2gKPiBzdWJzdGFnZToKPiAgIC0gY2hhbmdl MToKPiAgICAgICBydW4taWY6Cj4gICAgICAgICAtIGZpbGUtY2hhbmdlZDogPGZpbGVuYW1lPgo+ ICAgLSBjaGFuZ2UyOgo+ICAgICAgIHJ1bi1pZjoKPiAgICAgICAgIC0gZmlsZS1jaGFuZ2VkOgo+ ICAgICAgICAgICAgIC0gPGZpbGUxPgo+ICAgICAgICAgICAgIC0gPGZpbGUyPgo+IHtjb2RlfQoK CgotLQpUaGlzIG1lc3NhZ2Ugd2FzIHNlbnQgYnkgQXRsYXNzaWFuIEppcmEKKHYxMDAxLjAuMC1T TkFQU0hPVCMxMDAwNzkpCgotLS0tLS0tLS0tLS09XzE1MTg0NDgxMjktMTc4MzktMTY1CkNvbnRl bnQtVHlwZTogdGV4dC9odG1sOyBjaGFyc2V0PSJVVEYtOCIKQ29udGVudC1EaXNwb3NpdGlvbjog aW5saW5lCkNvbnRlbnQtVHJhbnNmZXItRW5jb2Rpbmc6IDdiaXQKCjxodG1sPjxib2R5Pgo8cHJl PlsgaHR0cHM6Ly9vdmlydC1qaXJhLmF0bGFzc2lhbi5uZXQvYnJvd3NlL09WSVJULTE4OTQ/cGFn ZT1jb20uYXRsYXNzaWFuLmppcmEucGx1Z2luLnN5c3RlbS5pc3N1ZXRhYnBhbmVsczphbGwtdGFi cGFuZWwgXTwvcHJlPgo8aDM+RGFuaWVsIEJlbGVua3kgcmVhc3NpZ25lZCBPVklSVC0xODk0Ojwv aDM+CjxwcmU+QXNzaWduZWU6IERhbmllbCBCZWxlbmt5ICAod2FzOiBpbmZyYSk8L3ByZT4KPGJs b2NrcXVvdGU+PGgzPkFkZCBjb25kaXRpb25hbCBleGVjdXRpb24gcGFyYW1ldGVyIChydW5faWYp IHRvIERTTCBvcHRpb25zPC9oMz4KPHByZT4gICAgIEtleTogT1ZJUlQtMTg5NAogICAgIFVSTDog aHR0cHM6Ly9vdmlydC1qaXJhLmF0bGFzc2lhbi5uZXQvYnJvd3NlL09WSVJULTE4OTQKIFByb2pl Y3Q6IG9WaXJ0IC0gdmlydHVhbGl6YXRpb24gbWFkZSBlYXN5CiAgICAgICAgIElzc3VlIFR5cGU6 IEltcHJvdmVtZW50CiAgICAgICAgIENvbXBvbmVudHM6IFNURENJIERTTApSZXBvcnRlcjogRGFu aWVsIEJlbGVua3kKQXNzaWduZWU6IERhbmllbCBCZWxlbmt5PC9wcmU+CjxwPldlIHdhbnQgdG8g aGF2ZSB0aGUgYWJpbGl0eSB0byBzcGVjaWZ5IGNvbmRpdGlvbmFsIGV4ZWN1dGlvbiBvZiB0aHJl YWRzIChzdGFnZSwgc3Vic3RhZ2UsICZoZWxsaXA7ICkgd2l0aCBkaWZmZXJlbnQgY29uZGl0aW9u cy4gVGhlIGZpcnN0IGNvbmRpdGlvbiB0byBpbXBsZW1lbnQgKGFuZCBwcm9iYWJseSB0aGUgbW9z dCBzdHJhaWdodGZvcndhcmQgb25lKSBpcyB0byBleGVjdXRlIGEgdGhyZWFkIGluIGNlcnRhaW4g ZmlsZXMgd2VyZSBjaGFuZ2VkLiBFeGFtcGxlIHNjaGVtYSBmb3IgdGhlIHN5bnRheDoge2NvZGU6 eWFtbH0gLS0tIHN0YWdlOiBjaGVjay1wYXRjaCBzdWJzdGFnZTo8L3A+CjxwcmU+ICAtIGNoYW5n ZTE6CiAgICAgIHJ1bi1pZjoKICAgICAgICAtIGZpbGUtY2hhbmdlZDogJmx0O2ZpbGVuYW1lJmd0 OwogIC0gY2hhbmdlMjoKICAgICAgcnVuLWlmOgogICAgICAgIC0gZmlsZS1jaGFuZ2VkOgotICZs dDtmaWxlMSZndDsKLSAmbHQ7ZmlsZTImZ3Q7PC9wcmU+CjxwPntjb2RlfTwvcD48L2Jsb2NrcXVv dGU+CjxwPiZtZGFzaDsgVGhpcyBtZXNzYWdlIHdhcyBzZW50IGJ5IEF0bGFzc2lhbiBKaXJhICh2 MTAwMS4wLjAtU05BUFNIT1QjMTAwMDc5KTwvcD4KCjxpbWcgc3JjPSJodHRwczovL3U0MDQzNDAy LmN0LnNlbmRncmlkLm5ldC93Zi9vcGVuP3Vwbj1pNVRNV0dWOTlhbUpiTnhKcFNwMi0yQkozM0JT TTN0dWlVZlJUazY0Sy0yQk9qSDZPZkh3SEYwN0tiV2dLaVY2Z20zbUIxSUkxOEJTQnRYUFJFajBX a2pmcUFnWFduc2h2Tm1pM2c3aGY3a3Y3RnFCa2kyUlp6Z0ZicVJuSzlnb3FxSmtjQWl6Vzdub2k3 RXB5QzdDeXE0bTVMY0ZZN2dGMWRmUEE3MWN0REp2MWl0UDU1SjRUYUlRME9WT0ZQS0xsRWtEcXZS NXp1LTJCT2lVdk1tekVKSWJNUUVkZDVUSVhkMEVVSXJaenBXazBBY2J0YTVpeS0yQldlY09ELTJG TVlDck90TkplbEpyMGttVmpTVC0yQmx2Q2NKWExnSHVyblViZU1DbkNWVlJIWnpQaW5qcVFYY0xD Ym1MLTJGRWFKSi0yRm1Ya0d1eDRUYVB1LTJGTnJFbFdQNjJCejBoZi0yQnQ5RlA2YjlGWGU1VTBs MFZnNmtFUWxtNHUzb0J2LTJGWkFHZWxKT2VFdWg5dmlmajJaT2dBem9Bd3U0cDFpbmVvVHluSkd2 UzRGLTJGOVA4cm1OOU5zbHdvZkNFS3NuR3pmRWRzbFYwV1hQWGpMSnZJcFFOIiBhbHQ9IiIgd2lk dGg9IjEiIGhlaWdodD0iMSIgYm9yZGVyPSIwIiBzdHlsZT0iaGVpZ2h0OjFweCAhaW1wb3J0YW50 O3dpZHRoOjFweCAhaW1wb3J0YW50O2JvcmRlci13aWR0aDowICFpbXBvcnRhbnQ7bWFyZ2luLXRv cDowICFpbXBvcnRhbnQ7bWFyZ2luLWJvdHRvbTowICFpbXBvcnRhbnQ7bWFyZ2luLXJpZ2h0OjAg IWltcG9ydGFudDttYXJnaW4tbGVmdDowICFpbXBvcnRhbnQ7cGFkZGluZy10b3A6MCAhaW1wb3J0 YW50O3BhZGRpbmctYm90dG9tOjAgIWltcG9ydGFudDtwYWRkaW5nLXJpZ2h0OjAgIWltcG9ydGFu dDtwYWRkaW5nLWxlZnQ6MCAhaW1wb3J0YW50OyIvPgo8L2JvZHk+PC9odG1sPgoKLS0tLS0tLS0t LS0tPV8xNTE4NDQ4MTI5LTE3ODM5LTE2NS0tCg== --===============4952029050087627617==--