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Hi,
On 19-05-15 23:18, Rik Theys wrote:
Hi,
On Tue, 19 May 2015, Bloemen, Jurri=EBn wrote:
I try to add a new host to a new cluster but I get this message:
Host <hostname> moved to Non-Operational state as host does not meet the cl=
uster's minimum CPU
level. Missing CPU features : model_Haswell
The Haswell cpu had a processor feature (hle, TSX-NI) that turned out to
be flaky and Intel disabled this feature with a microcode update.
The cpu's with the updated microcode no longer have the 'hle' feature in
/proc/cpuinfo. oVirt/libvirt does not see the cpu as "Haswell" as the
required feature is missing.
Upstream libvirt has introduced "Haswell-noTSX" variants and oVirt will
probably get a new CPU type to match in a future release.
For now I've configured the CPU model as SandyBridge on my Haswell
cpu's.
I filed a bug about this in the oVirt bugzilla:
https://bugzilla.redhat.com/show_bug.cgi?id=3D1218673
Thanks for clarifying that!
I had to go down to Intel Nehalem Family to get it working.
Regards,
Jurri=EBn
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<font face=3D"Liberation Sans">Hi,</font><br>
<br>
<div class=3D"moz-cite-prefix">On 19-05-15 23:18, Rik Theys
wrote:<br>
</div>
<blockquote cite=3D"mid:alpine.LRH.2.03.1505192314140.9495@esat.kuleuven.be=
" type=3D"cite">
Hi, <br>
<br>
On Tue, 19 May 2015, Bloemen, Jurri=EBn wrote: <br>
<blockquote type=3D"cite">I try to add a new host to a new cluster but I
ge=
t this message:
<br>
<br>
Host <hostname> moved to Non-Operational state as host does not meet =
the cluster's minimum CPU
<br>
level. Missing CPU features : model_Haswell <br>
</blockquote>
<br>
The Haswell cpu had a processor feature (hle, TSX-NI) that turned out to <b=
r>
be flaky and Intel disabled this feature with a microcode update. <br>
<br>
The cpu's with the updated microcode no longer have the 'hle' feature in
<b=
r>
/proc/cpuinfo. oVirt/libvirt does not see the cpu as "Haswell" as=
the <br>
required feature is missing. <br>
<br>
Upstream libvirt has introduced "Haswell-noTSX" variants and oVir=
t will <br>
probably get a new CPU type to match in a future release. <br>
<br>
For now I've configured the CPU model as SandyBridge on my Haswell <br>
cpu's. <br>
<br>
I filed a bug about this in the oVirt bugzilla: <br>
<a class=3D"moz-txt-link-freetext"
href=3D"https://bugzilla.redhat.com/show=
_bug.cgi?id=3D1218673">https://bugzilla.redhat.com/show_bug.cgi?i...
3</a>
<br>
</blockquote>
<br>
Thanks for clarifying that! <br>
<br>
I had to go down to Intel Nehalem Family to get it working.<br>
<br>
Regards,<br>
<br>
Jurri=EBn<br>
<br>
<br>
This message (including any attachments) may contain information that is pr=
ivileged or confidential. If you are not the intended recipient, please not=
ify the sender and delete this email immediately from your systems and dest=
roy all copies of it. You may not,
directly or indirectly, use, disclose, distribute, print or copy this emai=
l or any part of it if you are not the intended recipient
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